兰州大学机构库 >物理科学与技术学院
On-chip optical parity checker using silicon photonic integrated circuits
Liu, Zilong1,2; Wu, Xiaosuo1,2; Xiao, Huifu1,2; Han, Xu1,2; Chen, Wenping1,2; Liao, Miaomiao1,2; Zhao, Ting1,2; Jia, Hao1,2; Yang, JH(杨建红)1,2; Tian, YH(田永辉)1,2
Indexed BySCIE
2018-12
Source PublicationNANOPHOTONICS
ISSN2192-8606
Volume7Issue:12Pages:1939-1948
AbstractThe optical parity checker plays an important role in error detection and correction for high-speed, large-capacity, complex digital optical communication networks, which can be employed to detect and correct the error bits by using a specific coding theory such as introducing error-detecting and correcting codes in communication channels. In this paper, we report an integrated silicon photonic circuit that is capable of implementing the parity checking for binary string with an arbitrary number of bits. The proposed parity checker consisting of parallel cascaded N micro-ring resonators (MRRs) is based on directed logic scheme, which means that the operands applied to MRRs to control the switching states of the MRRs are electrical signals, the operation signals are optical signals, and the final operation results are obtained at the output ports in the form of light. A 3-bit parity checker with an operation speed of 10 kbps, fabricated on a silicon-on-insulator (SOI) platform using a standard commercial complementary metal-oxide-semiconductor (CMOS) process, was experimentally and successfully demonstrated.
Keywordintegrated optics optical switching devices optical logic devices resonators photonic integrated circuits
DOI10.1515/nanoph-2018-0140
Language英语
Funding ProjectOpened Fund of the State Key Laboratory on Integrated Optoelectronics[IOSKL2016KF14]
WOS Research AreaScience & Technology - Other Topics ; Materials Science ; Optics ; Physics
WOS SubjectNanoscience & Nanotechnology ; Materials Science, Multidisciplinary ; Optics ; Physics, Applied
WOS IDWOS:000451084700006
PublisherWALTER DE GRUYTER GMBH
Original Document TypeArticle
Citation statistics
Cited Times:2[WOS]   [WOS Record]     [Related Records in WOS]
Document Type期刊论文
Identifierhttp://ir.lzu.edu.cn/handle/262010/299769
Collection物理科学与技术学院
Corresponding AuthorYang, Jianhong; Tian, Yonghui
Affiliation1.Lanzhou Univ, Sch Phys Sci & Technol, Inst Microelect, Lanzhou 730000, Gansu, Peoples R China
2.Lanzhou Univ, Sch Phys Sci & Technol, Key Lab Magnetism & Magnet Mat MOE, Lanzhou 730000, Gansu, Peoples R China
First Author AffilicationSchool of Physical Sicence and Technology
Corresponding Author AffilicationSchool of Physical Sicence and Technology
Recommended Citation
GB/T 7714
Liu, Zilong,Wu, Xiaosuo,Xiao, Huifu,et al. On-chip optical parity checker using silicon photonic integrated circuits[J]. NANOPHOTONICS,2018,7(12):1939-1948.
APA Liu, Zilong.,Wu, Xiaosuo.,Xiao, Huifu.,Han, Xu.,Chen, Wenping.,...&Tian, Yonghui.(2018).On-chip optical parity checker using silicon photonic integrated circuits.NANOPHOTONICS,7(12),1939-1948.
MLA Liu, Zilong,et al."On-chip optical parity checker using silicon photonic integrated circuits".NANOPHOTONICS 7.12(2018):1939-1948.
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